2 Ieee Transactions on Very Large Scale Integration ( Vlsi

Ieee Transactions on Core Vlsi Ieee Transactions on Image Processing Ieee Transactions on Digital System Design Ieee Transactions on Testing Ieee Transactions on Communication Ieee Transactions on Low Power Vlsi

On the Effect of Floorplanning on the Yield of Large Area Integrated Circuits - Very Large Scale Integration (VLSI) Systems, IEEE Transactions on

Until recently, VLSI designers rarely considered yield issues when selecting a floorplan for a newly designed chip. This paper demonstrates that for large area VLSI chips, especially those that incorporate some fault tolerance, changes in the floorplan can affect the projected yield. We study several general floorplan structures, make some specific recommendations, and apply them to actual VLSI...

VLSI implementations of threshold logic-a comprehensive survey

This paper is an in-depth review on silicon implementations of threshold logic gates that covers several decades. In this paper, we will mention early MOS threshold logic solutions and detail numerous very-large-scale integration (VLSI) implementations including capacitive (switched capacitor and floating gate with their variations), conductance/current (pseudo-nMOS and output-wired-inverters, ...

A fuzzy clustering neural networks (FCNs) system design methodology

A system design methodology for fuzzy clustering neural networks (FCNs) is presented. This methodology emphasizes coordination between FCN model definition, architectural description, and systolic implementation. Two mapping strategies both from FCN model to system architecture and from the given architecture to systolic arrays are described. The effectiveness of the methodology is illustrated ...

Transactions on Very Large Scale Integration ( Vlsi

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION ( VLSI ) SYSTEMS 1 Synthesis of Pipelined DSP

1 Synthesis of Pipelined DSP Accelerators with Dynamic Scheduling P. Schaumont, B. Vanthournout, I. Bolsens, H. De Man, Fellow, IEEE Abstract|To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology is presented to synthesize high throughput DSP functions into accelerator p...